ACTS-Pune Inaugurates its 51st Batch of PG Diploma Programmes


600 students have secured admission in various PG Diploma courses like PG‐DAC, PG‐DITISS PG‐DBDA, PG‐DHPCSA and PG‐DIoT

Advanced Computing Training School (ACTS), Centre for Development for Advanced Computing (C‐DAC) Pune inaugurated its 51st batch of Post Graduate diploma programmes with formal induction programme for the newly admitted students.

The induction function was organised on August 21st, 2018, at Pt. Bhimsen Joshi Kalamandir Auditorium, Pune. Similar to every batch, ACTS centre has always remained the choice of students for its State‐of‐the‐art infrastructure and placements records. This time, 600 students have secured admission in various PG Diploma course like PG‐DAC, PG‐DITISS, PG‐DBDA, PG‐DESD & PG‐DVLSI, PG‐DHPCSA and PG‐DIoT offered at ACTS Pune Innovation Park campus.

International students also join the programmes

Six participants from the countries like Fiji, Morocco and Samoa have also joined the courses. On the other hand, few more participation from Kazakhstan and Namibia is expected soon. Shri Nitin Deshpande, President, Evolent Health International, Pune was the chief guest for the programme along with Col. Asheet Kumar Nath (Retd.), Executive Director, Corporate Strategy & C‐DAC, Pune.

Ms Mita Karajagi, Mr Aditya Kumar Sinha and Ms Risha P. R. were also among the dignitaries present on the dais to guide the students with the various functionalities of ACTS and C‐DAC. The induction programme was also attended by senior C‐DAC members, C‐DAC ACTS members, students and their parents.

R&D organisation to carry out research in IT and electronics

Centre for Development of Advanced Computing is the research and development (R&D) organisation of the Ministry of Electronics and Information Technology (MeitY) for carrying out R&D in IT, Electronics and associated areas. The setting up of C-DAC in 1988 itself was to built Supercomputers in context of denial of import of Supercomputers by the USA. Since then C-DAC has been undertaking the building of multiple generations of Supercomputer starting from PARAM with 1 GF in 1988.